This invention relates to microchips, common inside computers and microprocessors. More specifically, to integrate electronic and photonic circuits built on the surface on semi-conducting material, such as silicon. Further more to such devices of other than flat shape, such as a rectangular thin plate. Even more specifically to cylindrical bar or pipe shape. Also to such electronic circuits having high inductance elements, such as coils and antennas. Finally, to such microchips of three-dimensional built circuits, including memory blocks, transistors, diodes, inductors, and capacitors, resonators, modulators, filters, gates, switches and lasers.
Currently, electronic integrated circuits (IC) are built in a large array onto the surface of a large size (8xe2x80x3 diameter, {fraction (1/16)}xe2x80x3 thick) semiconductor disk, such as a silicon wafer, which is sliced from large single crystal ingot. Then said disk is cut to produce about a hundred Very Large Scale Integration (VLSI) microchips of about xc2xdxe2x80x3xc3x97{fraction (5/8)}xe2x80x3 size dies, which are further processed by soldering electrodes (leads) and adding cover material and plastic housing (packaging) to form microchips. Said microchip work inside computers, cell-phones, sensors, controllers and microprocessors to name a few applications. Smaller size wafers and dies are also common. Currently, the largest non-experimental wafer size is 12xe2x80x3 diameter.
Said current embodimentxe2x80x94the diexe2x80x94perhaps small, in one dimension, relatively large in the other dimensions and require very large manufacturing facilities with clean machinery and processes in clean rooms, as well as an army of clean dressed personnel. Said process makes current microchips rather expensive (over a thousand USD per square inches). Today, the VLSI circuit density is reaching its physical limit at ever-increasing relative cost, although at slowly decreasing absolute expense. That means that said chip-making technology itself is reaching its economical limit as well. The burden of switching to 12xe2x80x3 wafer technology industry-wide, appears to overwhelm any individual microchip maker. One reason of reaching that technological limit is that although said IC contains several layers of intermittent or patterned metal oxide, insulator, conductor and semiconductor parts, basically, all these layers add up to a coating size, so the microchip is by all means a two dimensional object. Thus to increase the density of said IC, there are to be used ever narrower conductors and insulating gaps between. Since said IC is printed by lithography and etching. The wavelength of the exposure lightxe2x80x94currently roentgen or xe2x80x9cdeepxe2x80x9d ultra violet (UV)xe2x80x94imposes limitation on the line width. Currently, the industry is down to 12-18 nanometer line width, which is the narrowest gap between two conductors in an IC. The smallest feature size currently is 50-100 nm. The deep x-ray limits that to 25 nm. Electron tunneling limits the line width to 3-5 nm. With the current accelerated microchip technology, the industryxe2x80x94insisting on Moor""s lawxe2x80x94expects to reach said limits within 15-20 years. One way out is to build IC vertically on the semiconductor substrate. U.S. Pat. Nos. 4,885,615, and 5,032,896, 6,034,882 and 6,185,122 disclose such an attempt. Several of these proved to be very successful, because of advances in recent chemical-mechanical-polishing CMP and polysilicon deposition techniques, such as chemical-vapor-deposition CVD. Another new technique may contribute to 3D architecture. That is the surface monolayer initiated polymerization (SMIP), which is slow and rough today due to lack of surface tension and quick local heating and cooling capability. The microbar is just the ideal substrate for SMIP.
An objective of this invention is, not to expand said physical limit, but rather the economical one. That is to make comparable, equal or better quality microchips of about the same or achievable much smaller overall dimensions; yet marketable for only a few USD per square inches. Furthermore, to produce it in much larger (ten, hundred or thousand times larger) quantity, than it is produced today, and to produce much rapidly. That is, from crystal growth to packaging within one week, rather than half a year. Finally, to produce it without the need for any clean room operation with a single, alas large automatic tool group, holding its own microclimate. That is to produce said novel chips without direct human intervention and handling, except for tool startup, maintenance and shutdown or rebuild. Optionally, to produce continuously, without any shut down. The new manufacturing plant needs to be just a small fraction of current facility size. Such plant""s environmental impact shall be marginal, shall utilize virtually all raw materials and shall consume rather small energy. The tool is to be designed and built in modules with standardized interfaces. Said modules are to be interchangeable and preferably made by different manufacturers. The emphasis of said new microchip making shifts from manpower to brainpower. That is from the daily plant operation, requiring many trained technicians to the tool and chip architecture design, requiring a few good engineers and scientists.
Another objective of this invention is to enable the integration of additional circuit elements, which require large scale coiling or closed fractal or loop antenna to add sizeable inductance or radio frequency (RF) power respectively. Du to the basic two dimensionality of current microchips, such elements are not used today. The basic bar geometry, i.e., three dimensionality of the microbar proposed here, allows the application of said elements new to Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuits. Further objective is that the addition of said new elements are not to restrain the open dimensionalityxe2x80x94at least in one (axial) directionxe2x80x94of the IC design to allow for size increase as integration level grows. Further more to allow for new IC design of closed loop in one (circumferential or tangential) dimension. Said closed loop IC would result in folding or turning around a flat rectangular IC to join its opposite edges, for instance wrapping it around a cylindrical surface. While left flat, such circuit closing can be achieved by wire connecting said opposite edges in the IC plain on a 2D microchip. Such flat circuit closing however consumes rather sizable chip area available for IC building and does not add inductance. One may observe that said new inductance and antenna elements could be printed on a Ball Semiconductor, manufactured by Ball Semiconductor Inc. in Texas as disclosed by U.S. Pat. No. 6,069,682 and a handful of other patents. This may be called microball, rather than a microchip. However, a microball IC designer can not increase IC size without increasing the microball diameter itself Said increase however has its natural limits. For instance, it is economical to make 1 mm diameter silicon balls by wafting but virtually impossible to make a 6 mm diameter one by other than machining, except in a space station plant, which is under no influence of gravity.
The proposed microbar has a definite advantage over a ball for being open axially. That is, a silicon bar can be processed (sized and polished) in CNC lathe and cut to different lengths to form the base material still as a single crystal for microbar manufacturing, again by special lathe processing. Further objective therefore to simplify IC manufacturing by using said lathe, for instance, using scanning laser lithography targeting the cylindrical surface of a rotating silicon round bar, rather than die image printing on a stationary substrate. Similarly all other processes common in microchip making is to be modified to lathe process. Said modifications shall represent no difficulty for the skilled in machine design and art. Said lathe shall hold its own clean microclimate, eliminating the need for clean rooms. Although said new lathe operation works on a single microbar at the time, said altered operations would be much faster than the corresponding microchip making processes, thus the fab throughput would be higher even for singe chuck lathe production. Said new processes would waste less material and consumables and would not require heating the entire silicon bar, but only a small spot on its surface at the time. Hollow or pipe-shape microbars could be cooled while processed in said lathe either by inert gas or liquid. That would allow by laser burning in rather than slot (masked) lithography. Since low temperature annealing body heating would still be needed, a longer microbar would require spindle support in said lathe. Said spindle supports as rollers may serve as heat sinks by roller cooling. One desired way to ensure continuity of microbar production is to make the tool holders redundant in said lathe. For instance, said lathe would have twoxe2x80x94rather than onexe2x80x94polishing tool holder, each ready to use and being used alternating (or one standing by) until one of them have some problem, when the other one would operate and the bad tool is being replaced. CMP, bumping, CVD, sputtering, doping and all other tools and tool holders would be similarly redundant or reconfigured and greatly simplified. Robotics would move in and out said tool holders as needed and switch lathes if required for microclimate change or for queuing processes.
Note that said microball is not instructivexe2x80x94expressively or intuitivelyxe2x80x94to proposed microbar. A microbar could be of any rotational shape, conical, semi-spherical, but also prismatic, such as square, hexagonal, octagonal and other bar shapes or their combination. The IC making on a hexagonal silicon bar however would be closer to microchip making in pieces in a specialized mill, rather than lathe machine. That is projected die lithography would be better suited for prismatic bars, and scanning laser lithography would be better suited for round bars of silicon, germanium or other semiconductor materials.
An other objective yet, to enable and ease Wafer Level Packaging (WLP) of proposed 3D microchip, called microbar, which would be better called Bar Level Packaging (BLP) to be the rule, rather than the exception. Yet conventional leads, wire bonding and packaging would be reserved as an option. Note that it is much easier to design and make gripping sleeve sockets with electrical contacts as opposed to flat pressing sockets, which impose too much bending stresses on a microchip. A microbar is not sensitive to any pressure, circular or axial one. Said BLP thus enable a further 3 to 9 fold reduction in handheld microelectronic devices, such as cell phones and GPS navigators, to name a few. Said microbar is readily pressure held, for instance, spring loaded or snap latched in military electronics, thereby ensuring their high shock and vibration resistance. Thus a microbar would enable control and guidance electronics to be built directly into explosive triggering weaponry and other new shock demanding applications. Said microball patent has a long list of microball over microchip advantages, which are also applicable to microbar. Microbars may need to have orientation marks for proper aligning in socket. Said socket may have single or multiple holes to receive or bread microbars. On a microbar surface, as a BLP, contact or solder rings or segmental may substitute solder bumps over the IC, separated by insulator layer or off IC area. The matching socket may be made by the same technique as microbars themselves. For instance, said socket may just be a split, spring-loaded microbar of a larger size. Such microbar packaging and socket allows for orderly more effective utilization of an integrated chip circuit and printed circuit board xe2x80x9creal estatexe2x80x9d. By another accounting, the current price of such an IC real estate is $1 billion and that of a board $1 million per acre. These prices would be reduced approximately to $5 million and $50 thousand respectively by using microbar, rather than microchip. Note, however that such xe2x80x9cestatesxe2x80x9d measures in square inches, not in acres.
Another objective of this invention is to optionally utilize not only the cylindrical surface of a microbar for IC building, but at lest one end face as well, if that is necessary for function or for even smaller size. For instance, said RF antenna may be etched to said face and ferrite core may be inserted to said end counter bore or through hole to increase magnetic flux of said coils integrated into said shell IC. Micro-Electro-Mechanical Systems (MEMS or micro-machines) may also be built to said end bore or hole. Also Optical Micro Machines (OMM), Micro-Electro-Mechanical-Optical Systems (MEMOS) such as Thermo-optic Switch, Liquid-Crystal Switch, Nonlinear Optical Switch (or optical transistors), laser or photonic wave-guides, Integrated Photonic Circuits (IPC), bubble micro optics, loudspeakers, microphones and other miniature electronic or electromechanical devices or components. MEM pump and control valve can be built into the hollow core of a microbar, which can operate as a heat pump to provide high efficiency cooling using micro-fluidics. That speeds up computation or sensor reaction and extend microbar lifetime in operation. Said hollow core may contain comparator (gauge) liquid or gas or biological agents in micro-sensors. Said through hole may be used as a sampler tube for particle counter micro-sensors or trace element detectors. Finally, IC may be built onto the inner surface of said bore or hole. Said through hole however is better utilized as spindle or chuck extensions in said lathe for rigidly holding said microbar in manufacturing, especially when its through heating approaching melting temperature is unavoidable for some processes. A spring loaded or pneumatic through bar with end button or inner chuck may be used for microbar holding if necessary. Thus, micro sensors, photonic routers and computers, RF transmitters and receivers, circular piezo actuators and flow controllers and a host of new functions are enabled by microbars, which are not practical or possible to make on microchips.
Recent advances in CNC lathe and mill technology and in micro positioning, allow us to step off the realm of microchip two dimensionality (2D) to microbar three dimensionality (3D), making some common fab processes, such as wafer CMP (Chemical Mechanical Polishing) obsolete in its current form. Such processesxe2x80x94due to induced vibration, capable to brake wafers frequentlyxe2x80x94appear to be the major obstacle in the road to switch from 200 mm to 300 mm wafer technology today. The microbar is especially suitable for 3D IC architecture, because any external layer is longer than any internal one, thus slightly opening up outward, in which direction, feature errors tend to accumulate naturally. Furthermore, because CVD polysilicon layers crystallize in large oriented grain due to the engineered balance of surface tension from cooling and centrifugal forces from spinning as physics allow. That enables making microbars of extremely large (terabyte) storage memory; of miniature size extremely strong magnets; of powerful micro electric motors and RF antennas and other devices unattainable before.